what is LPWAN ?

A lot of buzz nowadays around Lora, sigfox, NB-IOT and other LPWAN based technologies. this short post is about a basic introduction on the LPWAN technologies 

LPWAN means low power wide area network LPWAN technology is perfectly suited for connecting devices that need to send small amounts of data over a long range, while maintaining long battery life.

Lets see the following range vs power usage graph to see where LPWAN stands with othe communication technologies like Bluetooth , wifi , zigbee and others 

So LPWAN has the following characteristics:

• Low power (between 5 to 10 years)
• Range in kilometers (up to 10Km)
• Low bit-rate: Less than 5,000 bits per second. Often only 20-256 bytes per message are            sent several times a day.
• Clever modulation
• Cheap

LPWAN technologies can be sub divided into the following categories:

1. UNB
2. (NB-iot, NB-Ciot, LTE-iot)
3.  Lora

UNB	Cellular NB (narrowband)	Lora
Sigfox	NB-iot	Lora Alliance
Telensa	NB-Ciot	LinkLabs
Nwave	LTE-iot
eightless
Hardware Manufacturers
Texas instruments (Sigfox)	Qualcomm	Semtech
Atmel (Sigfox)	Intel	ST electronics (semtech licence )
Samsung (Sigfox)		Microchip (semtech licence )
Silicon labs (Sigfox)

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Callgraph generation using gcc, egypt & graphviz

In this post, we will see how to use gcc, egypt & graphviz to generate call graphs of any C-based source code / multiple source codes. This technique will be helpful if you are working on legacy code and want to have a view of the code architecture at first.

Among the three tools mentioned above, GCC is generally pre-installed in Linux. So You need to install the other two. 

Follow the following :

1. Download Egypt from here egypt download and then unzip it

~/Downloads$ tar -xzvf egypt-1.10.tar.gz ~/Downloads$ sudo mv egypt-1.10 /opt

go to the egypt directory then install it by these commands

/opt/egypt-1.10$ perl Makefile.PL /opt/egypt-1.10$ make /opt/egypt-1.10$ sudo make install

2. then install graphViz by

$sudo apt-get install graphviz

Alright then tools are installed So now let's go to the basics 

In order to generate call graph, you basically need the following steps 

1. compile and generate object files using gcc

2. generate RTL from the object files using gcc

3. generate the call graphs using egypt & graphviz 

RTL means Register transfer Language. It is used to describe the data flow at the register transfer level. It is actually a kind of intermediate representation that is very close to assembly language. 

First of all compile and run a simple C program with an additional file 

$mkdir test
$cd test
$notepadqq hello.h
$notepadqq hello.c
$notepadqq main.c

#include <stdio.h> #include "hello.h" void main(int argc, char const *argv[]) {     printf("I am the Main Function\n");     hello_world(); }

main.c

#ifndef HELLO_H #define HELLO_H void hello_world(void); #endif

hello.h

#include <stdio.h> #include "hello.h" void hello_world(void) {     printf("hello world\n"); }

hello.c 

Now let’s compile using GCC 

$gcc -Wall main.c hello.c -o hello $./hello

Now generate the RTL expands and run egypt command on the output to get a callgrqaph picture 

$gcc -fdump-rtl-expand main.c hello.c $egypt main.c.192r.expand hello.c.192r.expand | dot -Grankdir=LR -Tsvg -o hello.svg

now open the svg file and you will see the pictorial call graph of the hello application that you made

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ARM Cortex-M0 : Introduction

Well we designers come to a point when we want to go to the next level of embedded designing and we start to think about ARM based microcontrollers. So what is ARM ?

Actually ARM is a processor and the processor core is  sold by the company also named ARM to different vendors like STM , Texas Instruments , Atmel and so on . So these vendors do what ?
well instead of re designing the processor these compnaies make microcontrollers around the ARM processor . & we developers choose microcontroller from these vendors and start using it.

So why would all the vendors choose ARM ?

Because ARM ( advanced RISC machine) is a family of reduced instruction set computing architectures and requires less number of transistors than typical complex instructions set computing architecture s (CISC) . This approach reduces cost , power consumption and heat . for example ARM cortex M0 has 12,000 logic gates & even a 32 bit multiplication can be completed in 1 cycle. some of the important features are below:

Features: 

• Cortex- M processors are extremely C friendly
• increased performance and efficiency 
• Low cost
• extended battery life
• floating point 
• DSP capability 
• Lower operating frequency means : lower active power & lower EMI

More information on  ARM cortex M processor: 

• Remember ARM cortex M0 is a processor, Cortex M0 is designed as an ideal C target  
• Cortex M0 has 56 instructions 
• user can choose devices with smaller flash memory sizes for the the same application 
• The ARM Cortex-M1 processor is the first ARM processor designed specifically for implementation in FPGAs. 
• Cortex M0 processor is a 32 bit RISC (reduced instruction set computing) processor with Von neuman Architecture 
• clock frequency for the cortex M0 processor can be reduced significantly to achieve lower power consumption 
• Cortex M0 processor has implemented the ARMv6-m architecture 

Some Abbreviations:  

ASSP: Application Specific Standard products
SOC: System on chip
ARM:  originally Acorn RISC Machine , later Advanced RISC Machine
NVIC: Nested Vector Interrupt Controller
MDK: Microcontroller development Kit
AMBA: Advanced Microcontroller BUS architecture
AHB: Advanced High performane BUS
APB: Advanced peripheral Bus


Instruction sets : 

ARM cortex M processors supports 2 types of instructions sets

• 32 bit instruction set ----------- called ARM instruction set 
• 16 bit instruction set ----------- called Thumb instruction set 

for example ARM7TDMI supports both types of instruction sets 

Most instructions generated by the C compiler use the 16 bit instructions & 32 bit instructions are used when the 16-bit version cannot carry out the required operations. 

Interrupt types: 

Maskable Interrupt: The interrupts which can be ignored by the processor 

NMI(Non maskable interrupt): the interrupts that can not be ignored by the processor



Cortex M0 block diagram: 

Processor Core elements :

• Register Banks
• ALU(arithmetic logic unit)
• Control Logic 

AHB Lite Bus interface: is a on chip bus protocol used in many ARM processor . it is part of the AMBA ( Advanced Microcontroller BUS architecture) specification . it is 32 bits wide .

• APB means Advanced Peripheral Bus and you can see peripherals are attched with this BUS 
• AHB Lite supports 32,16,8 bit transfers

Unlike AHB lite APB does not support different sized transfers So APB should be accessed using word sized transfers 

                                           In ARM Word is 32 bits wide 

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Event Driven Embedded Programming

Introduction

I guess most of us as beginners in embedded systems programming in C++, probably start writing firmware with a super loop like architecture where

• all our statements/function calls reside in the main loop 
• we start including arduino like libraries 
• we create global objects & start using the objects in the main loop.  
• being a bit more mature & in order to manage evolving large code base we bring hierarchical models  to subgroup our code across different classes 

Fundamentally the code executes in a loop but the code is more manageable now.

The problem with the super loop is that it is not a very good approach to attain hard real-time performance and is not suited for the embedded applications where you need hard/soft real-time response. So what could be the solution?

The concept of RTOS

The firmware industry has a long history of being written in C with the RTOS approach, for example, VxWorks , freeRtos are very popular and robust. Obviously, RTOS is better than Super Loop considering real-time operation

RTOS types

RTOS is of two types: cooperative and preemptive

In Co-operative RTOS each task must finish before the time allotted for the completion of the task gets over. Meaning there should not be any blocking part in the code. There is an excellent book named “Patterns for Time-triggered Embedded Systems” by Michael J point where many design patterns have been shown to design embedded software using Co-operative RTOS. The author also suggests why a cooperative scheduler can be more effective and reliable than a preemptive scheduler if properly implemented.

On the other hand In preemptive RTOS Tasks can have blocking parts and in this part, context switching i.e. task switching can occur. Task switching can also occur in the middle of a task execution if a higher priority task is needed to be executed. This is called preemption.   When a preemption occurs the RTOS saves the current tasks states and then switches to another task. So usage of RAM is an issue here and also other complexity arises. Free RTOS is a well popular preemptive RTOS.

Remember CO-operative RTOS has also priority-based operation capability.

The concept of Active Object

As a firmware engineer, I always wanted to have a combination of all the best options out there. For instance i want to use some of the C++ & OOP features , use arduino ready made libraries & also use RTOS like scheduler to achieve soft/hard real time operation. 

Looking around i found Event-driven programming & active object concepts from Miro Samek, he is renowned in the embedded software industry. He created the Active object framework.

Active object has the following properties:

• Encapsulated 
• Non-blocking 
• HSM (hierarchical state machine) 
• Event queues 
• Event Publish and subscribe capability 

Miro samek’s quantum leaps offers Active object framework solution for different microprocessor architectures. They also offer modelling tools to generate code from UML diagrams. Currently these are the frameworks provided by quantum leaps:

• QP-nano
• QP-C
• QP-C++

These frameworks can work with 2 types of kernels underneath these are:

• Cooperative kernel (QV) (much like co-operative RTOS) 
• Preemptive Non-Blocking Kernel (QK) (much like preemptive RTOS but with non-blocking code)

There is an excellent document by miro samek named “beyond the RTOS” to explain the concepts

A minimum Event driven framework looks like this

1. void loop()
2. {
3.     if( event1() ) { Event_1_handler(); }
4.     else if( event1() ) { Event_1_handler(); }
5.     else if( event1() ) { Event_1_handler(); }
6.     else
7.     {
8.         goTo_idleState();
9.     }
10. }

Here the framework/ Supervisory event driven infrastructure waits for events
and dispatches them to application

Some important notes

• Calls to functions that poll internally (like delay()) are not allowed, because they would slow down the main loop and defeat the main purpose of event-driven programming
• The Event handler code MUST consist of Linear code that quickly returns control to the framework after handling each event 
• The event handler code must be designed in a way so that the event handler can pick up where it left for the last event. But to do this you need if-else branches and code is likely to become “spaghetti code “. The solution is concept of state machine 
• Qp –nano framework allows to combine event driven programming with state machines 
• In qp-nano framework there is multiple event queues  with priority property 
• There is a  state machine corresponding to each event 
• These Event queues are constantly monitored by a scheduler 
• Scheduler picks up the highest priority not-empty queue , after finding it > the scheduler extracts the event from the queue and sends it to the state machine associated with it . This is called dispatching of an event to the state machine 
• The design guarantees that the dispatch() operation for each state machine always runs to completion and returns to the main Arduino loop before any other event can be processed

The event queue + state machine + a unique priority is collectively called an Active Object

• When all event queues are empty the situation is idle condition . in this case QV_onIdle() is called , here processor can go to a low power sleep mode 

Conclusion

I think event driven programming is good for battery powered applications

I wish to work with this Active object framework at near future and write a blog post describing my hands on experience

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